| 摘要 |
<p>PURPOSE:To prevent parasitic inductance of a semiconductor element and enable the use at higher frequency for the element by forming a capacity on a grounding conductor and connecting the electrode of the element to the capacity and a DC bias supply terminal. CONSTITUTION:A metallic conductor 21 and a ceramic plate 22 are laminated, an opening 23 is perforated therethrough, a capacity 24 is soldered to the conductor 21 with barium titanate or the like as an inductor in the opening 23. A semiconductor chip 25 is soldered to a metallized layer 26, a collector terminal 26' is soldered thereto, and is plated with gold. Similarly, base and emitter lead terminals 27' and 28' are soldered to metallized layers 27 and 28, respectively, plated with gold, the base electrode of the chip 25 is connected to the layer 27, the emitter electrode is connected to the capacity 24, and the capacity 24 is connected to the layer 28. According to this configuration, the emitter electrode incorporates the high frequency grounding terminal 21 and a DC bias supply terminal 28' to reduce remarkably the grounding inductance to provide a semiconductor device which can be used to high frequency.</p> |
