| 摘要 |
PURPOSE:To enhance the reliability, the controllability and the maintenance property each, by dividing the address information into two groups at the common part and then transmitting the address signals to the address bus after giving the decoding process to each group. CONSTITUTION:The address information designating the individual input/output circuit provided every circuit is divided into two groups, and the 1st address decoder circuits 49 and 410 are provided within common control part 41 to give decoding to the address information to each group. Then the 2nd address decoder circuits 424-426 comprising the selection circuit which selects one of the signals transmitted via address buses 419 and 420 with every group plus the logic circuit which receives the signal selected every group for decoding are provided within individual input/output circuits 421-423. Thus the address information is decoded via the 1st and 2nd address decoder circuits. |
