发明名称 SEMICONDUCTOR MEMORY ELEMENT
摘要 PURPOSE:To simplify high-density implementation by reducing a memory cell in size by writing binary information in the memory cell via one colum array line. CONSTITUTION:One memory cell 6 consists of flip-flop circuits Q1 and Q2, and gate element Q5, and the transistor of either flip-flop circuit Q1 or Q2 is connected to column array line 4 via gate element Q5 so as to write binary information in cell 6 via one column array line 4. Consequently, the memory cell is reduced in size, wherefore high-density implementation comes into effect easily.
申请公布号 JPS55135393(A) 申请公布日期 1980.10.22
申请号 JP19790041831 申请日期 1979.04.06
申请人 NIPPON TELEGRAPH & TELEPHONE 发明人 HAYASHI TOSHIO;KAWARADA KUNIYASU
分类号 G11C11/411;G11C11/416 主分类号 G11C11/411
代理机构 代理人
主权项
地址
您可能感兴趣的专利