| 摘要 |
PURPOSE:To realize the delay synchronous system which features a short lock-in time and also can maintain the steady synchronous state, by providing the integrator and the sample holding circuit in place of the loop filter. CONSTITUTION:The output of correlater units 21 and 22 are compounded at compounding circuit 3 and then supplied to voltage control oscillator (VCO) 6 through integrator 7 and sample holding circuit 8 to give the control to the oscillation frequency of the VCO. The oscillation output of VCO6 is applied to local code generator 11 to give the control to the code signal phase of the output. On the other hand, sampling pulse generator 9 consists of variable divider 91 which divides the output of VCO6, division ratio setting counter 92 of divider 91, and pulse generator 93 which gives the count pulse to counter 92 each. And counter 92 receives the control for the start, stop and reset of its counting action via the start/stop/reset signal given from outside. |
