| 摘要 |
PURPOSE:To reduce excessive gate leakage current by setting the impurity concentration of the gate region lower than that of the channel region when a gate region is provided in a channel region lying between source and drain regions constituting a J-FET. CONSTITUTION:An n-type epitaxial layer 2, which is to become a channel region, is provided in p-type Si substrate 1, and n<+>-type source region 3 and n-type drain region 4 are formed by diffusion in this. Next, p-type gate region 5 is formed by diffusion between regions 3 and 4 in the channel region of layer 2. At this time, if the impurity concentration of layer 2 is about 4X10<15>atoms/cm<3>, the impurity concentration of region 5 is selected lower than that of layer 2, for example, 1.1X 10<15>atoms/cm<3> or 3.5X10<14>atoms/cm<3>. By this, even if region 5 is biased deep, the depletion layer spreads not only to region 4 but also to region 5, so that the field intensity in the depletion layer is weakened and the excessive gate leakage current is reduced. |
