发明名称 PB SIGNAL RECEPTION SYSTEM
摘要 PURPOSE:To simplify the circuit constitution and to make small the size, by generating the timing signal via the signal timer circuit and output timer circuit and controlling FF causing the output signal to the output leads with this timing signal. CONSTITUTION:The input signal fed to the input terminal IN is divided into two group at high and low group of band erase filters, converted into rectangular wave at the limiters 3 and 3', fed to FF30...33 and 30'...33' through BPF4...7 and 4'...7' to obtain the desired output 37. The detection circuits 28, 28' detect maximum value of the output of BPF4...7 and 4'...7', and rectify 29 and 29', and whether or not the rectified output is present in each group is checked at the AND circuit 12, the signal timer circuit 13 monitors the continuing time of the output of the circuit 12, the output timer 14 outputs the timing signal of a given continuing time to control FF30...33 and 30'...33', and the output signal is produced to the leads. Thus, the circuit constitution can be simplified and small size can be achieved.
申请公布号 JPS55104188(A) 申请公布日期 1980.08.09
申请号 JP19790010388 申请日期 1979.02.02
申请人 HITACHI LTD 发明人 ONO KATSUMASA
分类号 H04Q1/45;H04Q1/453 主分类号 H04Q1/45
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