发明名称 INTEGRATED CIRCUIT PACKAGE
摘要 <p>PURPOSE:To obtain high-reliability package by forming a resistance of prearranged value on a ceramic substrate and earthing the said resistance. CONSTITUTION:Ceramic substrate is established on ceramic substrate 11 with square hole in the center of copal earthing plate 16. Then MoMn pattern is created on the said substrate surface with lead terminal bonded on the external edge. The entire conductive part excepting substrate 11 is plated with gold and the internal edge is provided as a sealing area. Cr resistance 17 is established at the tip ahead of a pad on lead terminal 13'. In addition, MoMn pattern 12'' is established at the tip as a sealing area with a resistance value set at approximately 50 ohms. IC chip 14 is soldered on the earthing plate 16, is wire-connected 18 to a pad area inside the patterns 12, 12' and then the pad area of pattern 12'' and earthing plate 16 are wire- connected 18. Under this constitution, if an input signal is connected to terminal 13', the reflection of an input signal pulse is absorbed by the resistance 17 as a terminal resistance. Therefore, faulty action is eliminated.</p>
申请公布号 JPS5587463(A) 申请公布日期 1980.07.02
申请号 JP19780164019 申请日期 1978.12.25
申请人 FUJITSU LTD 发明人 SUYAMA KATSUHIKO;KUSAKAWA HIROTSUGU
分类号 H01L23/12;H01L25/00 主分类号 H01L23/12
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