发明名称 |
Parity checking circuit for continuous voltage signals - used for process or circuit function monitoring, including multichannel comparator with digital output |
摘要 |
<p>The circuit has an input channel for each voltage signal and a multi-channel comparator (VG1, VG2) coupled in series with each input channel comparing the respective voltage signal with at least one further voltage signal. Each comparator channel (VG1, VG2) provides a digital output with two possible values, with all the comparator channels (VG1, VG2) connected to a common circuit output (A) via a switch (R), such that an output signal, indicating correct functioning of all circuits etc. is only provided when the output signals form all the channels have a selected value outof the two possible values. Pref. each comparator channel (VG1, VG2) uses different circuit components and/or layout so that they have different responses to temp. variations, store electromagnetic fields etc.</p> |
申请公布号 |
DE2850832(A1) |
申请公布日期 |
1980.06.04 |
申请号 |
DE19782850832 |
申请日期 |
1978.11.24 |
申请人 |
MESSERSCHMITT-BOELKOW-BLOHM GMBH |
发明人 |
SCHILDT,GERHARD-HELGE,DR.-ING.;GAYEN,JAN-TECKER,DIPL.-ING. |
分类号 |
G01R19/00;G05B9/03;(IPC1-7):G05B1/03 |
主分类号 |
G01R19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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