| 摘要 |
PURPOSE:To secure the processing and delivering for the output of the OR array through the different functions according to the purposes by securing the selective connection between a set of the signal transmission line and the logic circuit. CONSTITUTION:The 1-bit decoder part 3 and 2-bit decoder part 5 are prepared in division every two bits of the input at decoder parts 81-100 to receive the input signals, and either one decoder is used selectively for each signal group and in accordance with the purpose. Each of output circuit parts 101-120 is for each output of the OR array respectively, and through-gate 4 as well as FF circuit 6 are prepared with every output bit. These two types of logic functions can be used selectively according to each purpose, and furthermore the coexistence of the two different function is possible on one chip. |
