| 摘要 |
PURPOSE:To reduce the occupation area of the memory cell while facilitating massproduction by arranging a MIS construction diode, an digit line and an address line to function as a bipolar transistor. CONSTITUTION:An n-type buried region 12 serving as the address line is formed inside a p-type conductor substrate 11 and wrapped with a p<+>-type buried layer 13. A thin insulator layer 15 constituting a MIS construction is applied on the surface of the substrate facing the layers, while a thick field insulator film 16 is provided on the surface of the substrate not facing thereof. A conductive material layer 14 acting as the surface side electrode of the MIS construction diode is applied on the layer 15 and the film 16 in such manner as to serve as the digit line. With such an arrangement, the region 12, a portion of the substrate 11 void of the inversion layer 17 between the wrapping layer 13 and the inversion layer 17 each function as the emitter, base and collector electrodes 22, 21 and 27 of an np<+>pn transistor. |
