发明名称 COUNTER CIRCUIT
摘要 PURPOSE:To secure the up-down counting between the upper and lower limit value by stopping the count contents at the prescribed upper and lower limit value each via the 1st and 2nd coincidence circuits. CONSTITUTION:Up-down counter 1 contains up-pulse input terminal 2 and down- pulse input terminal 3. And coincidence circuits 6 and 7 detect the coincidence of the count contents with the upper and lower limit value each. With the detection output of circuits 6 and 7, the introduction of the pulses is inhibited from outside, and thus the contents of cunter 1 can be stopped at the prescribed upper or lower limit value. As a result, the up-down counting is possible between the upper and lower limit value.
申请公布号 JPS5568741(A) 申请公布日期 1980.05.23
申请号 JP19780142983 申请日期 1978.11.20
申请人 NIPPON ELECTRIC CO 发明人 TOUFUKU SUKEYUKI
分类号 H03K23/00;(IPC1-7):03K23/00 主分类号 H03K23/00
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