| 摘要 |
PURPOSE:To suppress an increase in hardware by detecting an error of a selective assignment signal of a selector circuit by regarding it as a parity error of output data of the selector circuit. CONSTITUTION:A selective assignement signal is sent out through signal lines 51- 54 to indicate signal selection by logic ''1''. An exclusive-OR circuit makes a check on whether two selection indications exist at the same time to control selector circuit 1. Then, gate 6 generate the parity of a signal generated by coding the selective assignment signal by gates 4 and 5. by coded signals from signal lines 63 and 64 and a parity signal from signal line 65, exclusive-OR circuit 3 makes a parity check to output logic ''0'' where an error is found, thereby putting selector circuit 1 in an unselected state. At this time, since selector circuit 1 outputs data of all logic ''0'', it is found that selective assignment of circuit 1 is incorrect. An error report circuit of a register, etc., at the post stage of the selector circuit serves as that for the selective assignment signal, so that only small hardware will be required. |
