MOTOR SPEED CONTROL CIRCUIT

摘要

A phase-locked loop motor drive system includes a crystal-controlled frequency source for generating reference frequency pulses at a selectable frequency for driving the motor at a desired speed and a frequency divider coupled to the oscillator to reduce the oscillator frequency to a suitable value as a reference frequency for comparison with the frequency and phase of a signal derived from the motor. In order to provide fine adjustment of the motor speed, a speed control circuit is connected between the oscillator and the frequency divider to inhibit the passage of the oscillator pulses to the frequency divider for a selectable period immediately following an output pulse from the frequency divider when it is desired to decrease the motor speed, and inject a train of higher frequency pulses into the frequency divider while the passage of the oscillator pulses is inhibited when it is desired to increase the motor speed.