| 摘要 |
In a key input circuit, the key input signal is serialized and applied directly and through a circulating register working with a certain delay time to one gate for transmitting the direct key input signal and to another gate for transmitting the output of the register utilizing the other signal as an inhibitation signal. The output of the one gate is supplied to an output means which allows the passage at a predetermined time later and the output of the another gate is used to erase the corresponding contents of the register at a predetermined time later. This erasing is inhibited for a predetermined time period to allow a new key input signal.
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