| 摘要 |
An amorphous memory cell operated to have a first logic state represented by a high resistance state, substantially no crystal structure and a first threshold level and a second logic state represented by a high resistance state, microcrystal structure and a threshold level lower than the first threshold level. The logic state is read by monitoring the electrical characteristic of the cell for a constant voltage read pulse at a time greater than the threshold switching delay duration for the first logic state and less than the threshold switching delay duration for the second logic state at the read pulse voltage.
|
