发明名称 TIMING SIGNAL EXTRACTION CIRCUIT DEVICE
摘要 PURPOSE:To eliminate the influence of variation in input signal by attaining synchronous drawing-in at a high speed by making a modem vary the coefficient of a digital filter in accordance with the use mode of a timing signal extraction circuit. CONSTITUTION:An input signal is A/D-converted 6 and the led into BPF1, whose output is supplied to PLL2, a sampling pulse from which is supplied to A/D converter 6. Then, BPF1 uses tank circuit 1-0 of relatively-high Q or tank circuit 1-1 of relatively-low Q by switching to store information equivalent to each tank circuit, thereby varying the coefficient of filter 1 in accordance with the use mode. Therefore, a demodulation carrier and discrimination timing pulse can be generated at a high speed without being influenced by variation in input signal.
申请公布号 JPS5546660(A) 申请公布日期 1980.04.01
申请号 JP19780120270 申请日期 1978.09.29
申请人 FUJITSU LTD 发明人 HAYASHI TATSUKI;MURANO KAZUO;UMIGAMI SHIGEYUKI;AMANO FUMIO;ITOU YASUKAZU
分类号 H04L27/22;H03L7/08;H04L7/027;H04L7/033;H04L7/10;H04L27/06 主分类号 H04L27/22
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