| 摘要 |
PURPOSE:To provide high resistance of a complementary insulated gate field effect semiconductor device by forming source and drain regions provided on a semiconductor element at the region integral with high and low impurity density and providing a gate electrode only at the low density region. CONSTITUTION:A deep P-type well region 34 is formed to become N channel region in N-type silicon substrate 31 becoming P channel transistor region, and SiO2 film 35 is coated on the entire surface thereof. A plurality of openings 36 are perforated on the substrate 31 and region 34 on the film 35, Si3N4 film 37 is coated on the entire surface to diffuse impurities using the openings 36 selectively. That is, two N-type guardings 38 are diffused in the substrate 31, and P-type source and drain regins 43 and 44 are provided around the guardings 38. Similarly, P-type guarding 42 and N-type source and drain regions 39 and 40 around the guarding 42 are formed on the region 34. Then, high impurity density regions 46, 47, 48 are provided in contact with the regions 43, 44 and 39, 40, and gate electrode 52 is mounted only between the regions 43 and 44 and 39 and 40. |
