发明名称 |
SELECTIVE NOT GATE |
摘要 |
An interface device for selectively accessing two internal signal paths of an integrated circuit through a single external connection pin. Each of the signal paths is provided with a bias voltage sensitive conduction device that permits conduction at a different externally provided bias voltage that inhibits current flow in the other conduction device. The different bias voltages are provided to the external connection pin through an external load resistor. |
申请公布号 |
AU4011078(A) |
申请公布日期 |
1980.03.27 |
申请号 |
AU19780040110 |
申请日期 |
1978.09.22 |
申请人 |
PHILIPS' GLOEILAMPENFABRIEKEN, N.V. |
发明人 |
CHRISTOPHER PAUL SUMMERS;DONALD GEORGE THOMPSON |
分类号 |
H04N5/06;H03K5/02;H03K17/66;H04N5/04;H04N5/46 |
主分类号 |
H04N5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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