发明名称 PILOT SIGNAL ELIMINATOR FOR STEREORECEIVER
摘要 PURPOSE:To generate a signal in the same frequency as the pilot signal of 19KHz of FM stereobroadcasting and in the reverse phase, which is added to the input stage of a demodulation circuit to eliminate the pilot signal. CONSTITUTION:Output of an amplifier 1 to amplify a compound signal with output from a FM detection circuit as its input, becomes each input of a demodulation circuit 2, a detection circuit 11 and a phase lock loop (consisting of circuit 3-8) that is locked frequencywise to 19KHz. 38KHz signal of a frequency divider 7 is given to switching element of the demodulater circuit 2. The reverse phase signal of 19KHz of FF 15 becomes a cycle signal of the detector circuit 11, and at the same time, becomes input signal of AGC amplifier 14. Output of the detector circuit 11 is converted into DC signal by a low pass filter 12, amplified by an amplifier 13, and applied to the AGC amplifier as a control signal. The AGC amplifier supplies the reverse phase pilot signal in proportion to the pilot signal to the demodulator circuit 2 to implement elimination of the pilot signal.
申请公布号 JPS5535521(A) 申请公布日期 1980.03.12
申请号 JP19780108363 申请日期 1978.09.04
申请人 TOYO ELECTRONICS IND CORP 发明人 HIKITA JIYUNICHI
分类号 H04B1/16;H04H40/72 主分类号 H04B1/16
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