发明名称 PLL CIRCUIT FOR DOWN CONVERTER
摘要 PURPOSE:To realize a PLL circuit for down converter which can be digitally made into an IC by converting a signal outputted from a phase comparing circuit to a PWM signal by a PWM circuit consisting of a counter and a comparing circuit and supplying this signal to an integrating circuit. CONSTITUTION:A phase comparing circuit 2 digitally compares the phase of data which is outputted from an A/D converting circuit 1 and has, for example, eight bits as a unit and that of an 8-bit frequency divided signal outputted from a frequency dividing circuit 6 with each other. The digital error signal outputted from the phase comparing circuit 2 is inputted to a comparing circuit 11 and compared with the output of a counter 13. The comparing circuit 11 outputs a signal corresponding to the high level when the output of the phase comparing circuit 2 is larger than that of the counter 13, and the circuit 11 outputs a signal corresponding to the low level when the output of the circuit 2 is smaller than that of the counter 13. That is, the comparing circuit 11 outputs the PWM signal corresponding to the error signal.
申请公布号 JPH01270415(A) 申请公布日期 1989.10.27
申请号 JP19880099858 申请日期 1988.04.21
申请人 PIONEER ELECTRON CORP 发明人 SENSOU HITOSHI
分类号 H03L7/08;H03L7/093;H04N7/01 主分类号 H03L7/08
代理机构 代理人
主权项
地址