发明名称 PULSE COUNT DISPLAY UNIT
摘要 PURPOSE:To enable the display of 0 to m number, by using the m notation counter and BCD-m decoder. CONSTITUTION:When the counter 2 and the memory 4 are reset, the terminal 0 of the decoder 3 and the memory output are also L and the element 70 is illuminated. The terminal 1 of the decoder is at L with one pulse, the element 71 is illuminated, the memory 4 is at H, and the element 70 is distinguished. The element 7n is illuminated with the count value n and the count value returns to 0 with the next input pulse. In this case, since the memory output is at H, the element 70 is not illuminated, the L output of the decoder terminal 0 is inverted 5, the element 7n+1 is illuminated via the NAND gate 6, the count of the counter is at 1 with the next pulse to illuminate the element 71. The decimal notation counter and BCD-decimal decoder can illuminate 0 to 9, but the illumination control of elements from 0 to 10 can be made with this constitution.
申请公布号 JPS555527(A) 申请公布日期 1980.01.16
申请号 JP19780078147 申请日期 1978.06.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OBATA KIYOSHI;NISHIMURA KATSUHISA
分类号 G11B27/34;H03K21/08;H03K21/18 主分类号 G11B27/34
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