发明名称 Impedance control circuit for a semiconductor substrate
摘要 The semiconductor circuit device comprises a substrate bias generating circuit, a substrate voltage detecting circuit, and a substrate impedance adjusting circuit. When the detected substrate voltage decreases below a predetermined level, the substrate impedance adjusting circuit forms a through route between a substrate voltage terminal and any given terminal higher in potential than the substrate voltage terminal, to increase the substrate voltage at high speed, thus stabilizing threshold voltages or operation limit voltages of device elements which are subjected to the influence of the substrate voltage. Further, when the substrate voltage returns to the predetermined level, the substrate impedance adjusting circuit cuts off the formed through route for reduction of power consumption.
申请公布号 US5270583(A) 申请公布日期 1993.12.14
申请号 US19910687188 申请日期 1991.04.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MIYAWAKI, NAOKAZU;MURAKAMI, KIYOHARU
分类号 H01L27/04;G05F3/20;G11C11/408;H01L21/822;(IPC1-7):H03K3/01 主分类号 H01L27/04
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