| 摘要 |
PURPOSE:To obtain a counter circuit capable of counting the high-speed DC pulses by giving the operation to all counting relays first and then releasing the necessary counting relay with every arrival of the DC signal. CONSTITUTION:Relay X and Y operate alternately and according to the polarity between lines A and B. Prior to the operation of the circuit, all relays have operation via contact (b) of relay B not shown in the figure, and real PK self-supports. The first signal polarity of the DC signal features the signal row of A-Line+ and B-line-, the counting relays release in that order of PB, PC, PD, PE and PF; while the first signal polarity features A-line- and B-line+, the counting relays release in that order of PA, PC, PD, PE and PF respectively. After the end of the DC signal row, the operation state of each counting relay is decoded. And thus the counting of 1-10 can be carried out through the circuit shown in the figure. The signal row of lines A and B is bounded, for example, as shown in the chart. |
