| 摘要 |
A signaling extraction circuit utilizes common control circuitry to carry out the signal extraction function for all of a plurality of time multiplexed, digital data groups (digroups), each of which comprises 24 time division multiplexed, PCM encoded channels. Each digroup uses eight bits for transmitting digital information for each channel, but the eighth bit (D8) is borrowed for signaling purposes in every sixth frame. To identify these signaling digits, signaling frame information is inserted in a digroup bit stream in the framing bit position of every other frame (i.e., the subframes). A signaling subframe pattern store comprising a shared recirculating memory serves to maintain a continuing real time record of the pattern of the signaling framing information for each digroup, as well as a test digroup. When a predetermined pattern has been recorded for a digroup (i.e., a zero subframe bit preceded by a string of exactly three ones, or a one subframe bit preceded by a string of exactly three zeros) a signal bit store is enabled to receive the D8 bits of the signaling frame which follows the recording of said predetermined pattern. |
