发明名称 PROTECTION SYSTEM FOR SEMICONDUCTOR MEMORY UNIT
摘要 <p>PURPOSE:To prevent the destruction and deterioration of elements at the application and interruption of power supply, in the semiconductor memory unit through the use of a cell and logical sum circuits. CONSTITUTION:In the semiconductor memory unit using the semiconductor memory elements requiring a plurality of voltage sources, unless one power supply is applied or intermittent with another power supply fed to the semiconductor substrate, the elements may be demaged with greater current flowing. Then, other power supplies 2, 3 applied are detected with the logic circuit G operationable at all times, and for example, through the transistor Tr1 and diode 4, the power supply 4 for the semiconductor substrate is not fed from the cell B, a voltage is fed to the semiconductor substrate. Accordingly, the voltage fed to the semiconductor substrate is applied in advance than other power supplies when the power supplies are fed or they are restored from power failure, and it is interrupted later than the other power supplies at the interruption of power supply or rashing in power failure, thus, the damage and deterioration in the semiconductor memory elements at the application and interruption of power supplies can be prevented.</p>
申请公布号 JPS54153537(A) 申请公布日期 1979.12.03
申请号 JP19780062752 申请日期 1978.05.25
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKEUCHI SATORU;ISHIHARA KAZUNORI
分类号 G06F12/16;G06F1/26;G11C11/34;G11C11/405;G11C29/00 主分类号 G06F12/16
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