| 摘要 |
PURPOSE:To reduce an increase in the size of a circuit due to an increase in the number of buses for operation data and to optionally control the flow of operation data by selecting a combination of a connection between a memory data sending circuit and a data bus, and one of memory data fetching circuits. CONSTITUTION:Memories 118-121 send data to all of buses 100-103 through the memory data sending circuits 114-117. In this case, a data control circuit 104 sends control signals to control lines 122-125, 126-131. The control signals are stored in a program storing circuit as a pair of data. Thus, data flow between the circuits 114-117 and the memory data fetching circuits 105-110 can be controlled. |
