发明名称 LOGIC ARRAY CIRCUIT
摘要 PURPOSE:To increase the using efficiency of the array and thus to enhance the logic function by utilizing a piece of the wiring contained in the two wiring groups crossing each other within one or other array as the transmission line for both the input and output signals. CONSTITUTION:The wiring running through rows A1-A32 and B1-B20 plus columns a1-a16 is composed of the isolated regions shown by more than one broken line. Here, row A and B form the AND array and OR array each. The AND output of A9, A10 and A14 of column a7 cannot be transmitted to the OR array on a7 since other AND logic containing A8 exists at the lower part of the same column. In this case, a5 connected to part 1, for example, can be used as the transmission line by utilizing the connection means, i.e., part 1 which is not used for row A3. At the same time, both A1 and A6 can be delivered in the form constituting the AMD logic by securing such connection between A9, A10 and A14 as shown in the diagram.
申请公布号 JPS54148360(A) 申请公布日期 1979.11.20
申请号 JP19780056762 申请日期 1978.05.12
申请人 NIPPON ELECTRIC CO 发明人 ASOU AKIRA;KIMURA HIROMICHI
分类号 H03K19/177 主分类号 H03K19/177
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