发明名称 MEMORY CONTROL SYSTEM
摘要 PURPOSE:To prevent discontinuation of the charging pulse control or the like using the fixed data by providing two paris of memories memorizing the same fixed data, performing rewriting with blocking of one memory for the alteration of the fixed data and then transferring the memory to the other. CONSTITUTION:Memory 11 and 12 memorize the same fixed data, and one memory, for example, fixing memory 12 is blocked before the time of alteration in case the alteration request is given for the fixed data. Thus, the contents of memory 12 is altered via read/write circuit 15. At the time of alteration, the blocking of memory 12 is released, and at the same time fixing memory 12 not memory 11 is blocked to transfer the memory contents of memory 12 to memory 11. During this time, control part 14 produces the output pulses using the data of memory 11 and releases the blocking of memory 11 after transfer to use the data of memory 11 again. In such way, the control using the fixed data can be carried out continuously with no discontinuation.
申请公布号 JPS54142941(A) 申请公布日期 1979.11.07
申请号 JP19780052136 申请日期 1978.04.27
申请人 NIPPON ELECTRIC CO;NIPPON TELEGRAPH & TELEPHONE;OKI ELECTRIC IND CO LTD 发明人 MIURA OSAMU;TAKAHASHI KATSUHIRO;ITAYAMA KATSUYUKI;NAKAGAWA TOORU;SHIYUUBOU MIKIO;ARAI TOSHIO
分类号 H04Q3/545;G06F9/06;G06F12/00;G06F13/00;H04M15/00 主分类号 H04Q3/545
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