Semiconductor integrated circuit with dislocations

摘要

A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes proving a substrate. The substrate includes a gate stack over the substrate and source/drain regions separated by the gate stack. A first dislocation with a first pinch-off point is formed within the source/drain region with a first depth. A second dislocation with a second pinch-off point is formed within the source/drain region at a second depth. The second depth is substantial smaller than the first depth.

主权项

1. A method for fabricating a semiconductor integrated circuit (IC), the method comprising:
providing a substrate comprising a gate stack over the substrate; forming a gate spacer on a gate stack sidewall of the gate stack, wherein the gate spacer includes a first gate spacer sidewall interfacing with the gate stack sidewall of the gate stack and a second gate spacer sidewall opposing the first gate spacer sidewall; after the forming the gate spacer, forming a first dislocation with a first pinch-off point at a first depth of a source/drain region adjacent to the gate spacer, wherein the first pinch-off point is substantially vertically aligned with the second gate spacer sidewall; and forming a second dislocation with a second pinch-off point at a second depth of the source/drain region, wherein the second depth is substantial smaller than the first depth, and wherein the second pinch-off point is substantially vertically aligned with the first pinch-off point.