| 摘要 |
PURPOSE:To reduce the time until the operation is made stable after power supply is applied, by providing the means shortening the input terminals at the application of power supply, in the high input impedance circuit using FET's. CONSTITUTION:The potential of the gate G of FETQ1 is made equal to the drain voltage in timing with the drain to gate capacitance CGD, and simultaneously, the transistor Q2 is conductive through the capacitor CB. Thus, the high resistance RG is shortened and the capacitor CGD is rapidly charged up. When the capacitor CB is charged, the transistor Q2 is turned off. Accordingly, the inpedance of FETQ1 is decreased for a short time at the application of power supply, and the operation is made stable in a short time. |
