| 摘要 |
PURPOSE:To monitor the defects of all the patterns of output of the program counter including the defects of the program counter itself and the defects of the clock pulse. CONSTITUTION:If the pulse CLK stops on its half way due to the causes of failure at the adddress 1002 and CLK at the address 1003 is taken place, the counter output as to the address 1001 is given to the prediction circuit 2 at the pre-stage and the predicted output M at the address 1002 is memorized 4, then this is outputted. The output numeral C at the address 1002 of the program counter 1 is not executed for program for a short time and changed into the output at the address 1003, then C and M are not in agreement at the occurrence of comparison pulse CLKC and monitor output FAU is taken place, the failure is processed at the central operation unit, the program is re-executed by returning it to a given location. When jump instruction is present, the relative address signal AD jumped is given to the prediction circuit 2 from the control unit 3 and it is memorized 4 by adding to the output numeral of the counter 1. The output C representing the jumped address is obtained at the next CLK,C and M are compared 5, the similar processing is made to monitor the operation. |
