| 摘要 |
PURPOSE:To increase the chip selection access time by connecting the current switching transistor to the other end of the line array wire of the matrix formation of the semiconductor cell and then applying the signals synchronized with the chip selection signals. CONSTITUTION:The emitter of current switching Tr10 is connected to the other end of line array wire 6, and signal VCS is applied to the base in synchronization with the chip selection signal. Signal VCS is at a high level at the chip selection time, and all of Tr10 are turned off. At the chip non-selection time, signal VCS becomes high level, and driving circuit 5 of the line array wire which was at a low level at the chip selection time is turned off with Tr10 turned on. And circuit 5 of the line array wire which was at a high level at the chip selection time is kept at the ON-state and Tr10 kept OFF. After this, the high level of the line array wire is kept as it is when the chip is selected, and the low level is discharged by holding currnt IH. With setting the detection voltage at the detector circuit, the reading becomes possible simultaneously with input of the chip selection signal, thus shortening the chip selection access time. |
