| 摘要 |
A memory apparatus comprises a plurality of memory cells each having a bistable circuit comprising a pair of field effect transistors, a pair of switching transistors connected between a power supply and each output terminal of said paired field effect transistors, and a plurality of pairs of variable threshold insulated gate field effect transistors connected in parallel with the pair of switching transistors, the variable threshold insulated gate field effect transistors in pair constituting a non-volatile memory cell element, and a plurality of gate control lines connected in common to the gates of the paired variable threshold insulated gate field effect transistors. |
