发明名称 RECEIVER FOR MULTIPLE FREQUENCY SIGNALS
摘要 PURPOSE:To use outputs of two timer circuits to control two thershold values of output control circuits respectively, so that the outputs can be obtained by the same timing and, simultaneously, reduction in operation time of output signals and prevention of malfunction due to noise can be achieved. CONSTITUTION:Output T20 is obtained by feeding the output T10 of the timer circuit 6 having a leading delay time t6r and a trailing delay time t6f to timer circuit 7, and T30 is obtained by feeding the above-mantioned output T10 to timer circuit 8. Outputs T20 and T30 are connected to the (+) side of the operational amplifier of the output control circuits 5 of the comparator type via a diode; and output c of (F) and c' of (G) of rectifier circuit 4 are fed to the (-) side of the above- mentioned operational amplifier. Thus, the threshold values of output control circuit 5 become b of (F) and b' of (G). That is, threshold value VTH1 is set to a lower value before timer circuit 8 is operative, VTH2 is set to the value immediately after the operation of timer circuit 8 and before the response to noise interference taken place.
申请公布号 JPS5490914(A) 申请公布日期 1979.07.19
申请号 JP19770157231 申请日期 1977.12.28
申请人 HITACHI LTD 发明人 TAKAOKA KAZUHIKO
分类号 H04Q1/45;H04L27/26;H04Q1/453 主分类号 H04Q1/45
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