| 摘要 |
PURPOSE:To prevent performance down dependent upon RF interrupt even if the number of RF times is increased, by constituting a memory by plural storage modules which require refresh RF operation, a RF control circuit and an access control circuit. CONSTITUTION:When access request signal e is received from CPU 10, one of read/ write operation designation signals f and g is selected in access control circuit 16, and the read/write operation is executed in either of storage modules 14 and 15. When RF request signal n is generated, access control circuit 17 collates whether least significant bit d of the read/write operation and the least significant bit of the RF address agree with each other or not; and only in case of disagreement, a storage module where the read/write operation is not executed is selected. When the RF operation is not executed within a fixed period even if signal n is generated, forced RF request signal 0 is outputted from circuit 16 to execute forcedly the RF operation after the completion of the read/write operation, and signal e from CPU is inhibited during the RF operation. Thus, performance is not lowered even in case of RF interrupt. |
