| 摘要 |
PURPOSE:To improve a CN ratio, lock-up time, etc., by causing variation in the step of comparative signal fral/N to occur to a voltage control oscillator by multiplying the signal a programmable counter by N. CONSTITUTION:Between programmable counter 8 and phase comparator 9, N- multiplier circuit 11 is interposed to set oscillation frequency (fvco) of voltage control oscillator 7 P/N-times as much as comparative frequency (fr) (P is the dividing ratio of counter 8, and N is a fixed number). Since changing P into (+1) cause variation DELTAfvco=1/N.fr, i.e variation of oscillation frequency fvco in step 1/N.fr, (fr) is set to (Nx100) in order to obtain the variation in a step of, for example, 100Hz. For example, when N=10 is selected, (fr) is lKNz and the cut-off frequency of LPF10 can be increased, so that the CN ratio, lock-up time, stability of the PLL system can all be improved. |
