发明名称 SIGNAL DELIVERY CIRCUIT
摘要 PURPOSE:To make easy the wiring works, by taking the AC power supply signal between master and slave station into clock signal. CONSTITUTION:When the switch 4 of the master unit A is closed, the high frequency signal from the circuit 3 is superimposed on the power AC waves of the lines l1 and l2 and is delivered to the slave unit B, the reception circuit 9 driving the load 7. Further, when the switch r linked with the operation of the load 7 is closed, the signal from the oscillator 8 is fed to the receiver 5 of the master unit A and the driving of the load 7 is detected. In this case, the fault due to misconnection can be prevented by using the positive and negative signal of the AC power waves between the lines l1 and l2 as the clock signal.
申请公布号 JPS5481710(A) 申请公布日期 1979.06.29
申请号 JP19770150082 申请日期 1977.12.13
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 TANEMURA KENSABUROU;KAWAMURA TAKEYOSHI;SUZUKI YOSHIHARU
分类号 H04B3/50;H04B3/54 主分类号 H04B3/50
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