发明名称 LEVEL SHIFT CIRCUIT
摘要 PURPOSE:To establish the level shift circuit of small size. CONSTITUTION:Taking that the ground potential as 0(V) and low potential voltage as -V1(V), I N1,I N2=0(V) and CNT=-V2(V), and PMOSFET 10, 11 and NMOS FET 12 AND 13 are conductive. Next, at precharge condition, CNT=0(V) and EFT 12 and 13 are conductive, and the load capacitors 14, 15 are charged to -V2(V). Next, when CNT is again at -V2(V) and FEt 12 and 13 are again turned off. With this, precharge is finished. Further, when the data, for example, IN 1=''L''(-V1(V)) and IN2 =''H'' (0(V)) are fed to IN1 and IN2, FET 10 is conductive and FET 11 remains unconductive. Accordingly, the charge stored in the load capacitor 14 is discharged and OUT 1 at ''H'' level. On the other hand, since the charge precharged is remained in the load capacitor 15, OUT 2=''L'' is kept, and even if the data of ON1 and ON2 are returned to ''H'' of normal condition again, this condition is not changed.
申请公布号 JPS5481048(A) 申请公布日期 1979.06.28
申请号 JP19770149491 申请日期 1977.12.12
申请人 SEIKO INSTR & ELECTRONICS 发明人 ASANO KAZUHIRO
分类号 H03K5/02;H03K19/0185 主分类号 H03K5/02
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