发明名称 EXTERNAL APPEARANCE TEST UNIT
摘要 PURPOSE:To omit preparation of the ideal and fault-free pattern by detecting the electric quantity proportional to the received light volume for one of the two subjects to be tested and made into the same pattern and the electric quantity reversely proportional to the light volume for the other tested subject respectively and then applying the output obtained through addition of the above electric quantity to the display. CONSTITUTION:Tested semiconductor wafer 4a and 4b to which the same pattern is provided are placed on XY stage 1, and the light irradiated on wafer 4a is detected through detector 5a to be applied to compounding unit 7 in the form of the electric quantity. For wafer 4b, the reflection light of the irradiated light is used to be added to unit 7. Then the compound output is displayed at display 8. In this case if lack area B' of Al wiring A, foreign matter C and the like exists at one of the wafers, areas D-H of different brightness may occure at display 8. Thus, the identification of the fault can be facilitated. There is no problem at all practically since the probability is extremely small that the faults of the two patterns exist at the same area.
申请公布号 JPS5480087(A) 申请公布日期 1979.06.26
申请号 JP19770147078 申请日期 1977.12.09
申请人 HITACHI LTD 发明人 NAGASHIMA NAOYUKI
分类号 H01L21/66;G06K9/00;G06T1/00 主分类号 H01L21/66
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