| 摘要 |
PURPOSE:To enable high speed operation and to reduce the power comsumption by applying the high reverse voltage when necessary, by splitting the well formed on the CMOS substrate and selectively locating those applicable for high voltage. CONSTITUTION:A number of P channel type FETTrp are placed on the N type substrate 1 and the P wells 2 and 3 are formed with separation. A number of N channel type FETTrn1, Trn2 are formed in the well and thememory xell not applie with the reverse voltage is formed in the well 2 and the element of enable to apply high reverse voltage is formed in the well 3. The power supply voltage Vss is fed to the substrate 1 and Vsub(negative than Vss) is fed to the well 3. With this construction, the memory cell can memorize the information in good manner and the junction capacity for the part is covered by locating the high speed part for the readout time to the well 3, enabling to operate in high speed. Further, since the reverse voltage to reduce the junction capacitance is fed by selecting time, the power consumption of the circuit can be reduced. |
