| 摘要 |
PURPOSE:To prevent the variation in the demodulated output of the second bus due to the drawing phase change of the demodulation reference carrier and to reduce the error rate of the second bus, by performing the input signal code conversion of the second bus as specified. CONSTITUTION:The binary data of the first bus P1 is inputted from the terminal IN, it is converted into the difference signal with 4 phase PSK logic SL, and is inputted to the 16 phase modulation circuit 1. The data on the second bus P2 is made for disagreement detection with the SL output. Taking the exclusive logical sum as P1(+)q1=a, p2(+)q2=b, a=1 and b=1, when 1 is added to one terminal of EXOR gate ER13 ER14, P2 signal to other terminal is outputted with inversion and in other case, no inversion is made. Although (0,0) and (1,1) are not subject to this conversion, demodulation is made independently of the drawing phase because of the symmetry to the reference carriers X and Y. After that, input is made to the circuit 1, conversion is made to binary signal with the demodulation 2 of output, the corresponding signal of P1 and P2 is obtained from the terminals OUT and OUT', and the error rate of P2 can be improved. |
