| 摘要 |
PURPOSE:To obtain the steady high frequency pulse via a simple circuit using C.MOS featuring a reduced current capacity, by supplying the oscillation output to EOR directly and with a delay and also raising the power voltage of the oscillator circuit higher than the power voltage of EOR. CONSTITUTION:DC power source VDD1 AND VDD2 are supplied to oscillator circuit 11 and EOR circuit 18, and VDD1 VDD2 is set up. Pulse (a) delivered from circuit 11 is lowered down to a fixed level via resistance 17 and turned to the signal of waveform (b) to be supplied to one input terminal of EOR18. At the same time, pulse (a) is supplied to delay circuit 19, and signal C of the integral waveform is supplied to the other input terminal of EOR18, thus pulse (d) being delivered from EOR18. Pulse (d) then becomes double the oscillation frequency, thus obtaining the high frequency pulse in an easy way. |
