发明名称 FREQUENCY SYNTHESIZER
摘要 PURPOSE:To reduce power consumption by supplying PLL intermittently independently of the operating state such as standby or talking time of a radio equipment, and varying properly the on/off timing of the feeding depending on the operating state, thereby prolonging the off-period as longer as possible. CONSTITUTION:An output of a voltage controlled oscillator(VCO) 7 is inputted to a variable frequency divider 11 and inputted to one terminal of a phase comparator 3 while being frequency-divided into a designated frequency division ratio designated by a channel setting device 12. An output of a phase comparator 3 is converted into an analog signal by a charge pump 4 and becomes a control voltage of the VCO 7 via a switch 5 and a loop filter 6. Moreover, the switch 5 and the power supply 10 are subject to on/off control by an on/off control section 9 to turn on or off the PLL circuit. Thus, intermittent operation is implemented independently of the operating state of a radio equipment and the PLL circuit is turned on during channel switching operation, then considerable low power consumption is attained.
申请公布号 JPH0298216(A) 申请公布日期 1990.04.10
申请号 JP19880250033 申请日期 1988.10.05
申请人 IWATSU ELECTRIC CO LTD;TOKYO ELECTRIC POWER CO INC:THE 发明人 MINEGISHI ATSUSHI;OKAMURA KAZUHIDE
分类号 H03L7/187;H03L7/08 主分类号 H03L7/187
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