Dynamic semiconductor memory of matrix type - has single cell units with flip=flop read-write stages which relate to group of memory cells

摘要

A dynamic matrix memory using single transistor memory cells of the field effect type with isolated gate electrodes is designed to provide a high density memory chip. The circuit is designed to operate with word and bit decoders operating through address stages to select locations within the matrix. The bit time decoder (D2) is coupled to a number of read-write flip-flops (FF1, FF3) that relates to a group of memory cells (5). The bit lines couple in pairs to the flip-flop stages.