发明名称
摘要 <p>A memory circuit contains a variable threshold transistor arranged to receive optically coded information from an external light source. A WRITE voltage pulse is applied between the gate electrode and the substrate during the WRITE interval. The source and drain elements of the transistor are left "floating" during a WRITE interval whereupon the conduction threshold of the transistor assumes a level dependent upon the amplitude and duration of the WRITE voltage pulse and the intensity of the light received from the external source. Subsequently applied READ voltages produce a drain current having a magnitude indicative of the intensity of the light received during the occurrence of the WRITE voltage pulse.</p>
申请公布号 JPS4930581(B1) 申请公布日期 1974.08.14
申请号 JP19700043657 申请日期 1970.05.21
申请人 发明人
分类号 G11C17/00;G11C7/00;G11C13/04;G11C16/04;H01L29/792;H01L31/113;H03K3/42 主分类号 G11C17/00
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