发明名称 VOICE SIGNAL DEMODULATION CIRCUIT
摘要 <p>A circuit for demodulating digital voice signals consuming very small amounts of electric power. An external clock signal is subjected to frequency division to supply circuits with low-frequency clock pulses. Furthermore, provision is made of a logic circuit (1) which fixes the clock or the input data to the high level or to the low level during a period of other than the voice signals, the clock or the input data being input to the circuit that processes the signals of before the time axis is being extended in response to timing pulses generated in synchronism with the video signals.</p>
申请公布号 WO1990004901(P1) 申请公布日期 1990.05.03
申请号 JP1989001087 申请日期 1989.10.24
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