发明名称 CIRCUIT FOR CONVERTING ANALOG SIGNAL TO DIGITAL SIGNAL AND VICE VERSA
摘要 <p>A circuit arrangement is disclosed for individual subscribers in a telecommunication set up. The circuit arrangement converts analog signals into digital signals and digital signals into analog signals. When operated in a conference connection, summation signals are received by a subscriber which contain the subscriber's own share. Output digital signals from the subscriber are stored and converted into an analog value and are then subtracted from the received summation signal converted into an analog value.</p>
申请公布号 JPS5423368(A) 申请公布日期 1979.02.21
申请号 JP19780089296 申请日期 1978.07.21
申请人 SIEMENS AG 发明人 PEETAA HIRUSHIYUMAN;ERUNSUTO HEEFUAA
分类号 H03M1/02;H03M1/00;H04B14/00;H04B14/04;H04M3/42;H04M3/56;H04Q11/04 主分类号 H03M1/02
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