发明名称 Time correction circuit for a digital multiplexer
摘要 This disclosure relates to a time correction circuit that automatically adjusts the time position of each input pulse on each incoming digital line to a digital multiplexer so that each pulse is appropriately positioned to be sampled by the multiplexer into the correct time slot. A time correction circuit is provided on a per line basis. The correction circuit makes a relative comparison of each input pulse with a control pulse derived from the multiplexer sampling pulse and in response thereto it selectively inverts and shortens or lengthens each input pulse. This results in some portion of each input pulse being in the proper time position to be sampled by the multiplexer sampling pulse.
申请公布号 US4133981(A) 申请公布日期 1979.01.09
申请号 US19770861865 申请日期 1977.12.19
申请人 BELL TELEPHONE LABORATORIES, INCORPORATED 发明人 KIBLER, LYNDEN U.
分类号 H04J3/06;(IPC1-7):H04J3/06 主分类号 H04J3/06
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