发明名称 PARTIAL PLANARIZATION OF ELECTRICALLY INSULATIVE FILMS BY RESPUTTERING
摘要 <p>PARTIAL PLANARIZATION OF ELECTRICALLY INSULATIVE FILMS BY RESPUTTERING A method of partially planarizing an electrically insulative layer over an integrated circuit substrate which has a raised line metallization pattern having narrower lines and wider lines. The insulative layer has narrower and wider elevations corresponding to the underlying lines. Resputtering of said insulative layer is conducted for an amount of time sufficient to planarize the narrower elevations in the layer but insufficient to so planarize its wider elevations. This method is useful in planarizing insulative layer elevations through which via holes are to be formed, particularly via holes which are wider than the underlying metallizing lines which they contact. Such a planarization method in via hole formation avoids the tunneling effects which would otherwise result from the over-chemical etching necessary to form the via holes.</p>
申请公布号 CA1044378(A) 申请公布日期 1978.12.12
申请号 CA19780298325 申请日期 1978.03.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 LECHATON, JOHN S.;RICHARD, LEO P.;SMITH, DARYL C.
分类号 H01L21/203;(IPC1-7):01L21/203 主分类号 H01L21/203
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