发明名称 UPPDOWN COUNTER CIRCUIT
摘要 PURPOSE:To decrease the number of the random gate with enchanced integral degree by constituting a counter circuit with the circulation circuit formed by connecting the delay circuit in series and in plural number, the first gate circuit which decides the circulating direction of the data, the second gate circuit which decides finally a series of date.
申请公布号 JPS53133360(A) 申请公布日期 1978.11.21
申请号 JP19770048835 申请日期 1977.04.27
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SUZUKI YASOJI;KAMIMURA NOBUYUKI
分类号 H03K23/00;H03K21/40 主分类号 H03K23/00
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